Main Features

The Digital Transceiver is a turnkey solution providing a integrated data logger, digital down conversion (DDC), digital up conversion (DUC), and a spectrum analyzer (FFT) in a compact system.
Two 14-bit, 1 GHz ADCs; analog bandwidth 1 GHz (AC Coupled)
Two 16-bit, 1 GHz DACs; analog bandwidth 1 GHz (AC Coupled)
Xilinx Kintex-7 K410T2 FPGA
Intel Atom Quad Core, 8 GB RAM, 1GbE
Sustained logging rate up-to 300 MByte/s
Embedded power meter
Optional GPS 10 MHz ref clock/PPS

Digital Down-Converter (DDC)
Four independent 16-bit DDC channels
Programmable tuner: 1 – 1000 MHz; resolution 0.2328 Hz
Programmable bandwidth: 10 KHz – 100 MHz
Bandwidth 10 MHz DDC: SNR > 63 dB; SFDR > 82 dB
Support synchronous down-sampling on multiple channels using external clock/trigger
Synchronous VITA-49 timestamp

Digital Up-Converter (DUC)
Two independent 16-bit DUC channels
Programmable tuner: 1 – 1000 MHz; resolution 0.2328 Hz
Programmable bandwidth: 10 KHz – 100 MHz

Real-Time Spectrum Analyzer
FFT length: 32,768; 50% overlapped
Real-time bandwidth: 100 MHz
Resolution bandwidth: 3.8 KHz
100% Probability of Intercept: 393 μsec

Digital Transceiver K706 Overview
The K706 Digital Transceiver supports one FMC-1000 plug-in module providing two antenna inputs and four independent channels of DDC, two channels of DUC, and one spectrum analyzer embedded in a Xilinx Kintex-7 FPGA. It supports monitoring and/or recording of wide- or narrow-band spectra or channelized IF band data. The transceiver supports contiguous recording at 160 MByte/s until running out of disk space.
Each DDC has its own programmable tuner, programmable lowpass filtering, gain control, and decimation settings, supporting output bandwidth up-to 100 MHz. Data is packetized in VITA-49 format with accurate timestamps, synchronous to an external PPS signal. Each DDC channel can be enabled and disabled on the fly to conserve host computer storage and bandwidth. An embedded power meter monitors the power (dBm) of the ADC inputs, supporting analog gain control of optional, user-supplied external front-end devices.
The spectrum analyzer, which supports windowing, calculates the wide-band spectrum of raw ADC data or the narrow-band spectrum of the DDC output data at a programmable update rate. A programmable peak hold feature may be enabled to latch transient activity in the spectrum. The programmable threshold monitoring spectrum feature tracks spectral activities of up-to 512 bins.
A development kit is available for custom designs. Users can insert custom-made cores to create more advanced applications.

K706 block diagram

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